• Three Families — LX/SX/FX
- Virtex-4 LX: High-performance logic applications solution
- Virtex-4 SX: High-performance solution for digital signal processing (DSP) applications
- Virtex-4 FX: High-performance, full-featured solution for embedded platform applications
• Xesium™ Clock Technology
- Digital clock manager (DCM) blocks
- Additional phase-matched clock dividers (PMCD)
- Differential global clocks
• XtremeDSP™ Slice
- 18 x 18, two’s complement, signed Multiplier
- Optional pipeline stages
- Built-in Accumulator (48-bit) and Adder/Subtracter
• Smart RAM Memory Hierarchy
- Distributed RAM
- Dual-port 18-Kbit RAM blocks
· Optional pipeline stages
· Optional programmable FIFO logic automatically
remaps RAM signals as FIFO signals
- High-speed memory interface supports DDR and DDR-2
SDRAM, QDR-II, and RLDRAM-II.
• SelectIO™ Technology
- 1.5V to 3.3V I/O operation
- Built-in ChipSync™ source-synchronous technology
- Digitally controlled impedance (DCI) active termination
- Fine grained I/O banking (configuration in one bank)
• Flexible Logic Resources
• Secure Chip AES Bitstream Encryption
• 90 nm Copper CMOS Process
• 1.2V Core Voltage
• Flip-Chip Packaging including Pb-Free Package Choices
• RocketIO™ 622 Mb/s to 6.5 Gb/s Multi-Gigabit Transceiver (MGT) [FX only]
• IBM PowerPC RISC Processor Core [FX only]
- PowerPC 405 (PPC405) Core
- Auxiliary Processor Unit Interface (User Coprocessor)
• Multiple Tri-Mode Ethernet MACs [FX only]
Complete and up-to-date documentation of the Virtex-4 family of FPGAs is available on the Xilinx web site. In addi- tion to the most recent Virtex-4 Family Overview, the follow- ing files are also available for download:
Virtex-4 FPGA Data Sheet: DC and Switching
This data sheet contains the DC and Switching Characteris- tic specifications for the Virtex-4 family.
This guide includes chapters on:
• Clocking Resources
• Digital Clock Manager (DCM)
• Phase-Matched Clock Dividers (PMCD)
• Block RAM and FIFO memory
• Configurable Logic Blocks (CLBs)
• SelectIO Resources
• SelectIO Logic Resources
• Advanced SelectIO Logic Resources
XtremeDSP for Virtex-4 FPGAs User Guide
This guide describes the DSP48 slice and includes refer- ence designs for using DSP48 math functions and various FIR filters.
Virtex-4 FPGA Configuration Guide
This all-encompassing configuration guide includes chap- ters on configuration interfaces (serial and SelectMAP), bit- stream encryption, Boundary-Scan and JTAG configuration, and reconfiguration techniques.
Virtex-4 FPGA Packaging and Pinout Specification
This specification includes the tables for device/package combinations and maximum I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and thermal specifications.
Virtex-4 FPGA PCB Designer’s Guide
This guide describes PCB guidelines for the Virtex-4 family. It covers SelectIO signaling, RocketIO signaling, power dis- tribution systems, PCB breakout, and parts placement.
Virtex-4 RocketIO Multi-Gigabit Transceiver User Guide
This guide describes the RocketIO Multi-Gigabit Transceiv- ers available in the Virtex-4 FX family.
Virtex-4 FPGA Embedded Tri-Mode Ethernet MAC User
This guide describes the Embedded Tri-Mode Ethernet Media Access Controller available in the Virtex-4 FX family.
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